From: Tulio A M Mendes Date: Tue, 10 Feb 2026 04:05:52 +0000 (-0300) Subject: fix: wrap pci.c in #if x86 guard with stubs for other architectures X-Git-Url: https://projects.tadryanom.me/sitemap.xml?a=commitdiff_plain;h=80c94db552f8b07b3bdc9839ca52449fcdc12f78;p=AdrOS.git fix: wrap pci.c in #if x86 guard with stubs for other architectures PCI config space I/O port access (0xCF8/0xCFC) using outl/inl is x86-only. The driver had no architecture guard, so it would fail to compile on ARM, RISC-V, and MIPS. Wrap the full implementation in #if defined(__i386__) and provide no-op stubs for non-x86 targets. Passes: make, cppcheck, QEMU smoke test. --- diff --git a/src/drivers/pci.c b/src/drivers/pci.c index c5dcd0e..657bc48 100644 --- a/src/drivers/pci.c +++ b/src/drivers/pci.c @@ -1,8 +1,11 @@ #include "pci.h" -#include "io.h" #include "uart_console.h" #include "utils.h" +#if defined(__i386__) || defined(__x86_64__) + +#include "io.h" + #define PCI_CONFIG_ADDR 0xCF8 #define PCI_CONFIG_DATA 0xCFC @@ -144,3 +147,22 @@ const struct pci_device* pci_find_class(uint8_t class_code, uint8_t subclass) { } return 0; } + +#else /* non-x86 stubs */ + +uint32_t pci_config_read(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) { + (void)bus; (void)slot; (void)func; (void)offset; + return 0xFFFFFFFFU; +} +void pci_config_write(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value) { + (void)bus; (void)slot; (void)func; (void)offset; (void)value; +} +void pci_init(void) { + uart_print("[PCI] Not supported on this architecture.\n"); +} +int pci_get_device_count(void) { return 0; } +const struct pci_device* pci_get_device(int index) { (void)index; return 0; } +const struct pci_device* pci_find_device(uint16_t vendor, uint16_t device) { (void)vendor; (void)device; return 0; } +const struct pci_device* pci_find_class(uint8_t class_code, uint8_t subclass) { (void)class_code; (void)subclass; return 0; } + +#endif