From: Tulio A M Mendes <tadryanom@hotmail.com>
Date: Fri, 13 Feb 2026 08:22:35 +0000 (-0300)
Subject: fix: add IOAPIC route for IRQ 15 (secondary ATA channel)
X-Git-Url: https://projects.tadryanom.me/docs/POSIX_ROADMAP.md?a=commitdiff_plain;h=462c65aedfb5e37b6b9cc26eec5f10c53f9f6e35;p=AdrOS.git

fix: add IOAPIC route for IRQ 15 (secondary ATA channel)

The secondary ATA channel (IRQ 15, vector 47) was not routed through
the IOAPIC. After the multi-drive ATA refactor, ata_pio_init() probes
the secondary channel, which can generate IRQ 15 (e.g. IDENTIFY to
QEMU's ATAPI CD-ROM). Without a proper IOAPIC route:

1. The interrupt was lost (PIC disabled, IOAPIC not routing it)
2. The IOAPIC pin 15 remained in an undefined state
3. Depending on timing, this could cause spurious behavior

This was the likely root cause of intermittent kernel panics/reboots
when booting without the 'ring3' cmdline flag — the timing difference
meant the secondary ATA probe's unhandled IRQ could manifest as an
unrecoverable interrupt state.

Build: clean, cppcheck: clean, smoke: 19/19 pass
---

diff --git a/src/arch/x86/arch_platform.c b/src/arch/x86/arch_platform.c
index cccb242..6775767 100644
--- a/src/arch/x86/arch_platform.c
+++ b/src/arch/x86/arch_platform.c
@@ -118,13 +118,16 @@ int arch_platform_setup(const struct boot_info* bi) {
         if (ioapic_init()) {
             uint32_t bsp_id = lapic_get_id();
             /* Route ISA IRQs through IOAPIC:
-             * IRQ 0 (PIT/Timer)    -> IDT vector 32
-             * IRQ 1 (Keyboard)     -> IDT vector 33
-             * IRQ 14 (ATA primary) -> IDT vector 46 */
+             * IRQ 0  (PIT/Timer)      -> IDT vector 32
+             * IRQ 1  (Keyboard)       -> IDT vector 33
+             * IRQ 11 (E1000 NIC)      -> IDT vector 43
+             * IRQ 14 (ATA primary)    -> IDT vector 46
+             * IRQ 15 (ATA secondary)  -> IDT vector 47 */
             ioapic_route_irq(0,  32, (uint8_t)bsp_id);
             ioapic_route_irq(1,  33, (uint8_t)bsp_id);
             ioapic_route_irq(11, 43, (uint8_t)bsp_id); /* E1000 NIC */
-            ioapic_route_irq(14, 46, (uint8_t)bsp_id);
+            ioapic_route_irq(14, 46, (uint8_t)bsp_id); /* ATA primary */
+            ioapic_route_irq(15, 47, (uint8_t)bsp_id); /* ATA secondary */
 
             /* Now that IOAPIC routes are live, disable the legacy PIC.
              * This must happen AFTER IOAPIC is configured to avoid