--- /dev/null
+#ifndef HAL_CPU_H
+#define HAL_CPU_H
+
+#include <stdint.h>
+
+uintptr_t hal_cpu_get_stack_pointer(void);
+uintptr_t hal_cpu_get_address_space(void);
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top);
+
+void hal_cpu_enable_interrupts(void);
+void hal_cpu_idle(void);
+
+#endif
--- /dev/null
+#include "hal/cpu.h"
+
+#if defined(__aarch64__)
+
+uintptr_t hal_cpu_get_stack_pointer(void) {
+ uintptr_t sp;
+ __asm__ volatile("mov %0, sp" : "=r"(sp));
+ return sp;
+}
+
+uintptr_t hal_cpu_get_address_space(void) {
+ return 0;
+}
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) {
+ (void)sp_top;
+}
+
+void hal_cpu_enable_interrupts(void) {
+ __asm__ volatile("msr daifclr, #2" ::: "memory");
+}
+
+void hal_cpu_idle(void) {
+ __asm__ volatile("wfi" ::: "memory");
+}
+
+#else
+
+uintptr_t hal_cpu_get_stack_pointer(void) { return 0; }
+uintptr_t hal_cpu_get_address_space(void) { return 0; }
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) { (void)sp_top; }
+void hal_cpu_enable_interrupts(void) { }
+void hal_cpu_idle(void) { }
+
+#endif
--- /dev/null
+#include "hal/cpu.h"
+
+#if defined(__mips__)
+
+uintptr_t hal_cpu_get_stack_pointer(void) {
+ uintptr_t sp;
+ __asm__ volatile("move %0, $sp" : "=r"(sp));
+ return sp;
+}
+
+uintptr_t hal_cpu_get_address_space(void) {
+ return 0;
+}
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) {
+ (void)sp_top;
+}
+
+void hal_cpu_enable_interrupts(void) {
+}
+
+void hal_cpu_idle(void) {
+ __asm__ volatile("wait" ::: "memory");
+}
+
+#else
+
+uintptr_t hal_cpu_get_stack_pointer(void) { return 0; }
+uintptr_t hal_cpu_get_address_space(void) { return 0; }
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) { (void)sp_top; }
+void hal_cpu_enable_interrupts(void) { }
+void hal_cpu_idle(void) { }
+
+#endif
--- /dev/null
+#include "hal/cpu.h"
+
+#if defined(__riscv)
+
+uintptr_t hal_cpu_get_stack_pointer(void) {
+ uintptr_t sp;
+ __asm__ volatile("mv %0, sp" : "=r"(sp));
+ return sp;
+}
+
+uintptr_t hal_cpu_get_address_space(void) {
+ return 0;
+}
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) {
+ (void)sp_top;
+}
+
+void hal_cpu_enable_interrupts(void) {
+ __asm__ volatile("csrsi mstatus, 0x8" ::: "memory");
+}
+
+void hal_cpu_idle(void) {
+ __asm__ volatile("wfi" ::: "memory");
+}
+
+#else
+
+uintptr_t hal_cpu_get_stack_pointer(void) { return 0; }
+uintptr_t hal_cpu_get_address_space(void) { return 0; }
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) { (void)sp_top; }
+void hal_cpu_enable_interrupts(void) { }
+void hal_cpu_idle(void) { }
+
+#endif
--- /dev/null
+#include "hal/cpu.h"
+
+#include "gdt.h"
+
+#if defined(__i386__) || defined(__x86_64__)
+
+uintptr_t hal_cpu_get_stack_pointer(void) {
+ uintptr_t sp;
+#if defined(__x86_64__)
+ __asm__ volatile("mov %%rsp, %0" : "=r"(sp));
+#else
+ __asm__ volatile("mov %%esp, %0" : "=r"(sp));
+#endif
+ return sp;
+}
+
+uintptr_t hal_cpu_get_address_space(void) {
+ uintptr_t as;
+#if defined(__x86_64__)
+ __asm__ volatile("mov %%cr3, %0" : "=r"(as));
+#else
+ __asm__ volatile("mov %%cr3, %0" : "=r"(as));
+#endif
+ return as;
+}
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) {
+ tss_set_kernel_stack(sp_top);
+}
+
+void hal_cpu_enable_interrupts(void) {
+ __asm__ volatile("sti");
+}
+
+void hal_cpu_idle(void) {
+ __asm__ volatile("hlt");
+}
+
+#else
+
+uintptr_t hal_cpu_get_stack_pointer(void) {
+ return 0;
+}
+
+uintptr_t hal_cpu_get_address_space(void) {
+ return 0;
+}
+
+void hal_cpu_set_kernel_stack(uintptr_t sp_top) {
+ (void)sp_top;
+}
+
+void hal_cpu_enable_interrupts(void) {
+}
+
+void hal_cpu_idle(void) {
+}
+
+#endif