#include "kernel/boot_info.h"
#include "uart_console.h"
+#include "console.h"
extern void kernel_main(const struct boot_info* bi);
(void)args;
uart_init();
- uart_print("\n[AdrOS] Booting...\n");
+ kprintf("\n[AdrOS] Booting...\n");
struct boot_info bi;
bi.arch_magic = 0;
#include "kernel/boot_info.h"
#include "uart_console.h"
+#include "console.h"
extern void kernel_main(const struct boot_info* bi);
(void)args;
uart_init();
- uart_print("\n[AdrOS] Booting...\n");
+ kprintf("\n[AdrOS] Booting...\n");
struct boot_info bi;
bi.arch_magic = 0;
#include "kernel/boot_info.h"
#include "uart_console.h"
+#include "console.h"
extern void kernel_main(const struct boot_info* bi);
(void)args;
uart_init();
- uart_print("\n[AdrOS] Booting...\n");
+ kprintf("\n[AdrOS] Booting...\n");
struct boot_info bi;
bi.arch_magic = 0;
#include "arch/x86/acpi.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "vmm.h"
uint32_t num_pages = (uint32_t)((page_end - page_start) >> 12);
if (num_pages > ACPI_TMP_VA_PAGES) {
- uart_print("[ACPI] Table too large to map.\n");
+ kprintf("[ACPI] Table too large to map.\n");
return NULL;
}
const struct acpi_rsdp* rsdp = find_rsdp();
if (!rsdp) {
- uart_print("[ACPI] RSDP not found.\n");
+ kprintf("[ACPI] RSDP not found.\n");
return -1;
}
- uart_print("[ACPI] RSDP found, revision=");
- char tmp[12];
- itoa(rsdp->revision, tmp, 10);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[ACPI] RSDP found, revision=%d\n", (int)rsdp->revision);
/* Get RSDT (ACPI 1.0 — 32-bit pointers).
* The RSDT may be above the 16MB identity-mapped range, so use acpi_map_phys. */
const struct acpi_sdt_header* rsdt_hdr =
(const struct acpi_sdt_header*)acpi_map_phys(rsdt_phys, sizeof(struct acpi_sdt_header));
if (!rsdt_hdr) {
- uart_print("[ACPI] Cannot map RSDT header.\n");
+ kprintf("[ACPI] Cannot map RSDT header.\n");
return -1;
}
uint32_t rsdt_len = rsdt_hdr->length;
const struct acpi_rsdt* rsdt =
(const struct acpi_rsdt*)acpi_map_phys(rsdt_phys, rsdt_len);
if (!rsdt) {
- uart_print("[ACPI] Cannot map full RSDT.\n");
+ kprintf("[ACPI] Cannot map full RSDT.\n");
return -1;
}
if (!acpi_checksum(rsdt, rsdt_len)) {
- uart_print("[ACPI] RSDT checksum failed.\n");
+ kprintf("[ACPI] RSDT checksum failed.\n");
acpi_unmap_all();
return -1;
}
acpi_unmap_all();
if (!madt_phys) {
- uart_print("[ACPI] MADT not found.\n");
+ kprintf("[ACPI] MADT not found.\n");
return -1;
}
const struct acpi_sdt_header* madt_hdr =
(const struct acpi_sdt_header*)acpi_map_phys(madt_phys, sizeof(struct acpi_sdt_header));
if (!madt_hdr) {
- uart_print("[ACPI] Cannot map MADT header.\n");
+ kprintf("[ACPI] Cannot map MADT header.\n");
return -1;
}
uint32_t madt_len = madt_hdr->length;
const struct acpi_madt* madt =
(const struct acpi_madt*)acpi_map_phys(madt_phys, madt_len);
if (!madt) {
- uart_print("[ACPI] Cannot map full MADT.\n");
+ kprintf("[ACPI] Cannot map full MADT.\n");
return -1;
}
if (!acpi_checksum(madt, madt_len)) {
- uart_print("[ACPI] MADT checksum failed.\n");
+ kprintf("[ACPI] MADT checksum failed.\n");
acpi_unmap_all();
return -1;
}
if (parse_madt(madt) < 0) {
- uart_print("[ACPI] MADT parse failed.\n");
+ kprintf("[ACPI] MADT parse failed.\n");
acpi_unmap_all();
return -1;
}
g_acpi_valid = 1;
/* Print summary */
- uart_print("[ACPI] MADT: ");
- itoa(g_acpi_info.num_cpus, tmp, 10);
- uart_print(tmp);
- uart_print(" CPU(s), LAPIC=");
- itoa_hex(g_acpi_info.lapic_address, tmp);
- uart_print(tmp);
- uart_print(", IOAPIC=");
- itoa_hex(g_acpi_info.ioapic_address, tmp);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[ACPI] MADT: %u CPU(s), LAPIC=0x%x, IOAPIC=0x%x\n",
+ (unsigned)g_acpi_info.num_cpus,
+ (unsigned)g_acpi_info.lapic_address,
+ (unsigned)g_acpi_info.ioapic_address);
for (uint8_t i = 0; i < g_acpi_info.num_cpus; i++) {
- uart_print("[ACPI] CPU ");
- itoa(i, tmp, 10);
- uart_print(tmp);
- uart_print(": LAPIC ID=");
- itoa(g_acpi_info.cpu_lapic_ids[i], tmp, 10);
- uart_print(tmp);
- uart_print(g_acpi_info.cpu_enabled[i] ? " (enabled)" : " (disabled)");
- uart_print("\n");
+ kprintf("[ACPI] CPU %u: LAPIC ID=%u%s\n",
+ (unsigned)i, (unsigned)g_acpi_info.cpu_lapic_ids[i],
+ g_acpi_info.cpu_enabled[i] ? " (enabled)" : " (disabled)");
}
return 0;
#include "arch/x86/gdt.h"
#include "arch/x86/idt.h"
#include "uart_console.h"
+#include "console.h"
#include "arch/x86/multiboot2.h"
void arch_early_setup(const struct arch_boot_args* args) {
uart_init();
- uart_print("\n[AdrOS] Booting...\n");
+ kprintf("\n[AdrOS] Booting...\n");
uint32_t magic = (uint32_t)(args ? args->a0 : 0);
uintptr_t mbi_phys = (uintptr_t)(args ? args->a1 : 0);
if (magic != 0x36d76289) {
- uart_print("[ERR] Invalid Multiboot2 Magic!\n");
+ kprintf("[ERR] Invalid Multiboot2 Magic!\n");
} else {
- uart_print("[OK] Multiboot2 Magic Confirmed.\n");
+ kprintf("[OK] Multiboot2 Magic Confirmed.\n");
}
- uart_print("[AdrOS] Initializing GDT/TSS...\n");
+ kprintf("[AdrOS] Initializing GDT/TSS...\n");
gdt_init();
- uart_print("[AdrOS] Initializing IDT...\n");
+ kprintf("[AdrOS] Initializing IDT...\n");
idt_init();
struct boot_info bi;
if (total_size >= 8) {
multiboot_copy_size = total_size;
if (multiboot_copy_size > sizeof(multiboot_copy)) {
- uart_print("[WARN] Multiboot2 info too large, truncating copy.\n");
+ kprintf("[WARN] Multiboot2 info too large, truncating copy.\n");
multiboot_copy_size = sizeof(multiboot_copy);
}
#include "keyboard.h"
#include "syscall.h"
#include "timer.h"
-#include "uart_console.h"
#include "console.h"
#include "uaccess.h"
#include "vga_console.h"
#if defined(__i386__)
static void userspace_init_thread(void) {
if (!fs_root) {
- uart_print("[ELF] fs_root missing\n");
+ kprintf("[ELF] fs_root missing\n");
process_exit_notify(1);
schedule();
for (;;) hal_cpu_idle();
current_process->heap_break = heap_brk;
vmm_as_activate(user_as);
- uart_print("[ELF] starting /bin/init.elf\n");
+ kprintf("[ELF] starting /bin/init.elf\n");
- uart_print("[ELF] user_range_ok(entry)=");
- uart_put_char(user_range_ok((const void*)entry, 1) ? '1' : '0');
- uart_print(" user_range_ok(stack)=");
- uart_put_char(user_range_ok((const void*)(user_sp - 16), 16) ? '1' : '0');
- uart_print("\n");
+ kprintf("[ELF] user_range_ok(entry)=%c user_range_ok(stack)=%c\n",
+ user_range_ok((const void*)entry, 1) ? '1' : '0',
+ user_range_ok((const void*)(user_sp - 16), 16) ? '1' : '0');
hal_cpu_set_kernel_stack((uintptr_t)&ring0_trap_stack[sizeof(ring0_trap_stack)]);
if (hal_usermode_enter(entry, user_sp) < 0) {
- uart_print("[USER] usermode enter not supported on this architecture.\n");
+ kprintf("[USER] usermode enter not supported on this architecture.\n");
process_exit_notify(1);
schedule();
for (;;) hal_cpu_idle();
#include "arch/x86/cpuid.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stddef.h>
}
void x86_cpuid_print(const struct x86_cpu_features* f) {
- uart_print("[CPUID] Vendor: ");
- uart_print(f->vendor);
- uart_print("\n");
+ kprintf("[CPUID] Vendor: %s\n", f->vendor);
if (f->brand[0]) {
- uart_print("[CPUID] Brand: ");
- uart_print(f->brand);
- uart_print("\n");
+ kprintf("[CPUID] Brand: %s\n", f->brand);
}
- uart_print("[CPUID] Features:");
- if (f->fpu) uart_print(" FPU");
- if (f->tsc) uart_print(" TSC");
- if (f->msr) uart_print(" MSR");
- if (f->pae) uart_print(" PAE");
- if (f->apic) uart_print(" APIC");
- if (f->sep) uart_print(" SEP");
- if (f->pge) uart_print(" PGE");
- if (f->mmx) uart_print(" MMX");
- if (f->fxsr) uart_print(" FXSR");
- if (f->sse) uart_print(" SSE");
- if (f->sse2) uart_print(" SSE2");
- if (f->sse3) uart_print(" SSE3");
- if (f->ssse3) uart_print(" SSSE3");
- if (f->sse41) uart_print(" SSE4.1");
- if (f->sse42) uart_print(" SSE4.2");
- if (f->avx) uart_print(" AVX");
- if (f->htt) uart_print(" HTT");
- if (f->nx) uart_print(" NX");
- if (f->lm) uart_print(" LM");
- if (f->x2apic) uart_print(" x2APIC");
- if (f->hypervisor) uart_print(" HYPERVISOR");
- if (f->syscall) uart_print(" SYSCALL");
- if (f->smep) uart_print(" SMEP");
- if (f->smap) uart_print(" SMAP");
- uart_print("\n");
-
- uart_print("[CPUID] APIC ID: ");
- char tmp[12];
- itoa(f->initial_apic_id, tmp, 10);
- uart_print(tmp);
- uart_print(", Logical CPUs: ");
- itoa(f->logical_cpus, tmp, 10);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[CPUID] Features:");
+ if (f->fpu) kprintf(" FPU");
+ if (f->tsc) kprintf(" TSC");
+ if (f->msr) kprintf(" MSR");
+ if (f->pae) kprintf(" PAE");
+ if (f->apic) kprintf(" APIC");
+ if (f->sep) kprintf(" SEP");
+ if (f->pge) kprintf(" PGE");
+ if (f->mmx) kprintf(" MMX");
+ if (f->fxsr) kprintf(" FXSR");
+ if (f->sse) kprintf(" SSE");
+ if (f->sse2) kprintf(" SSE2");
+ if (f->sse3) kprintf(" SSE3");
+ if (f->ssse3) kprintf(" SSSE3");
+ if (f->sse41) kprintf(" SSE4.1");
+ if (f->sse42) kprintf(" SSE4.2");
+ if (f->avx) kprintf(" AVX");
+ if (f->htt) kprintf(" HTT");
+ if (f->nx) kprintf(" NX");
+ if (f->lm) kprintf(" LM");
+ if (f->x2apic) kprintf(" x2APIC");
+ if (f->hypervisor) kprintf(" HYPERVISOR");
+ if (f->syscall) kprintf(" SYSCALL");
+ if (f->smep) kprintf(" SMEP");
+ if (f->smap) kprintf(" SMAP");
+ kprintf("\n");
+
+ kprintf("[CPUID] APIC ID: %u, Logical CPUs: %u\n",
+ (unsigned)f->initial_apic_id, (unsigned)f->logical_cpus);
}
#include "fs.h"
#include "heap.h"
#include "pmm.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "vmm.h"
fs_node_t* node = vfs_lookup(interp_path);
if (!node) {
- uart_print("[ELF] interp not found: ");
- uart_print(interp_path);
- uart_print("\n");
+ kprintf("[ELF] interp not found: %s\n", interp_path);
return -ENOENT;
}
fs_node_t* node = vfs_lookup(filename);
if (!node) {
- uart_print("[ELF] file not found: ");
- uart_print(filename);
- uart_print("\n");
+ kprintf("[ELF] file not found: %s\n", filename);
vmm_as_destroy(new_as);
return -ENOENT;
}
const elf32_ehdr_t* eh = (const elf32_ehdr_t*)file;
int vrc = elf32_validate(eh, file_len);
if (vrc < 0) {
- uart_print("[ELF] invalid ELF header\n");
+ kprintf("[ELF] invalid ELF header\n");
kfree(file);
vmm_as_activate(old_as);
vmm_as_destroy(new_as);
uintptr_t highest_seg_end = 0;
int lrc = elf32_load_segments(file, file_len, new_as, 0, &highest_seg_end);
if (lrc < 0) {
- uart_print("[ELF] segment load failed\n");
+ kprintf("[ELF] segment load failed\n");
kfree(file);
vmm_as_activate(old_as);
vmm_as_destroy(new_as);
if (irc == 0) {
real_entry = interp_entry;
has_interp = 1;
- uart_print("[ELF] loaded interp: ");
- uart_print(interp_path);
- uart_print("\n");
+ kprintf("[ELF] loaded interp: %s\n", interp_path);
}
break;
}
int src2 = elf32_map_user_range(new_as, user_stack_base, user_stack_size, VMM_FLAG_RW);
if (src2 < 0) {
- uart_print("[ELF] OOM mapping user stack\n");
+ kprintf("[ELF] OOM mapping user stack\n");
kfree(file);
vmm_as_activate(old_as);
vmm_as_destroy(new_as);
#include "arch/x86/gdt.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
struct gdt_entry {
}
void gdt_init(void) {
- uart_print("[GDT] Initializing GDT/TSS...\n");
+ kprintf("[GDT] Initializing GDT/TSS...\n");
gp.limit = (uint16_t)(sizeof(struct gdt_entry) * GDT_MAX_ENTRIES - 1);
gp.base = (uint32_t)(uintptr_t)&gdt;
gdt_flush((uint32_t)(uintptr_t)&gp);
tss_flush(0x28);
- uart_print("[GDT] Loaded.\n");
+ kprintf("[GDT] Loaded.\n");
}
#include "arch/x86/idt.h"
#include "arch/x86/lapic.h"
#include "io.h"
-#include "uart_console.h"
+#include "console.h"
#include "process.h"
#include "spinlock.h"
#include "uaccess.h"
}
void idt_init(void) {
- uart_print("[IDT] Initializing Interrupts...\n");
+ kprintf("[IDT] Initializing Interrupts...\n");
idtp.limit = (sizeof(struct idt_entry) * IDT_ENTRIES) - 1;
idtp.base = (uint32_t)&idt;
// Load IDT
__asm__ volatile("lidt %0" : : "m"(idtp));
- uart_print("[IDT] Loaded.\n");
+ kprintf("[IDT] Loaded.\n");
}
void register_interrupt_handler(uint8_t n, isr_handler_t handler) {
// ... imports ...
void print_reg(const char* name, uint32_t val) {
- char buf[16];
- uart_print(name);
- uart_print(": ");
- itoa_hex(val, buf);
- uart_print(buf);
- uart_print(" ");
+ kprintf("%s: %x ", name, val);
}
// The Main Handler called by assembly
__asm__ volatile("cli"); // Stop everything
- uart_print("\n\n!!! KERNEL PANIC !!!\n");
- uart_print("Exception Number: ");
- char num_buf[16];
- itoa(regs->int_no, num_buf, 10);
- uart_print(num_buf);
- uart_print("\n");
+ kprintf("\n\n!!! KERNEL PANIC !!!\n");
+ kprintf("Exception Number: %u\n", (unsigned)regs->int_no);
- uart_print("registers:\n");
+ kprintf("registers:\n");
print_reg("EAX", regs->eax); print_reg("EBX", regs->ebx); print_reg("ECX", regs->ecx); print_reg("EDX", regs->edx);
- uart_print("\n");
+ kprintf("\n");
print_reg("ESI", regs->esi); print_reg("EDI", regs->edi); print_reg("EBP", regs->ebp); print_reg("ESP", regs->esp);
- uart_print("\n");
+ kprintf("\n");
print_reg("EIP", regs->eip); print_reg("CS ", regs->cs); print_reg("EFLAGS", regs->eflags);
- uart_print("\n");
+ kprintf("\n");
// Print Page Fault specifics
if (regs->int_no == 14) {
uint32_t cr2;
__asm__ volatile("mov %%cr2, %0" : "=r"(cr2));
- uart_print("\nPAGE FAULT at address: ");
- char cr2_buf[16];
- itoa_hex(cr2, cr2_buf);
- uart_print(cr2_buf);
- uart_print("\n");
+ kprintf("\nPAGE FAULT at address: 0x%x\n", cr2);
}
- uart_print("\nSystem Halted.\n");
+ kprintf("\nSystem Halted.\n");
for(;;) __asm__("hlt");
}
}
#include "arch/x86/ioapic.h"
#include "arch/x86/lapic.h"
#include "vmm.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stdint.h>
int ioapic_init(void) {
if (!lapic_is_enabled()) {
- uart_print("[IOAPIC] LAPIC not enabled, skipping IOAPIC.\n");
+ kprintf("[IOAPIC] LAPIC not enabled, skipping IOAPIC.\n");
return 0;
}
ioapic_active = 1;
- uart_print("[IOAPIC] Enabled at phys=");
- char tmp[12];
- itoa_hex((uint32_t)phys_base, tmp);
- uart_print(tmp);
- uart_print(", max IRQs=");
- itoa(ioapic_max_irqs, tmp, 10);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[IOAPIC] Enabled at phys=0x%x, max IRQs=%u\n",
+ (unsigned)phys_base, (unsigned)ioapic_max_irqs);
return 1;
}
#include "hal/cpu_features.h"
#include "vmm.h"
#include "io.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stdint.h>
int lapic_init(void) {
const struct cpu_features* f = hal_cpu_get_features();
if (!f->has_apic) {
- uart_print("[LAPIC] CPU does not support APIC.\n");
+ kprintf("[LAPIC] CPU does not support APIC.\n");
return 0;
}
if (!f->has_msr) {
- uart_print("[LAPIC] CPU does not support MSR.\n");
+ kprintf("[LAPIC] CPU does not support MSR.\n");
return 0;
}
lapic_active = 1;
- uart_print("[LAPIC] Enabled at phys=");
- char tmp[12];
- itoa_hex((uint32_t)phys_base, tmp);
- uart_print(tmp);
- uart_print(", ID=");
- itoa(lapic_get_id(), tmp, 10);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[LAPIC] Enabled at phys=0x%x, ID=%u\n",
+ (unsigned)phys_base, (unsigned)lapic_get_id());
return 1;
}
lapic_write(LAPIC_TIMER_DCR, LAPIC_TIMER_DIV_16);
lapic_write(LAPIC_TIMER_ICR, ticks_per_interrupt);
- uart_print("[LAPIC] Timer started at ");
- char tmp[12];
- itoa((int)frequency_hz, tmp, 10);
- uart_print(tmp);
- uart_print("Hz (ticks=");
- itoa_hex(ticks_per_interrupt, tmp);
- uart_print(tmp);
- uart_print(")\n");
+ kprintf("[LAPIC] Timer started at %uHz (ticks=0x%x)\n",
+ (unsigned)frequency_hz, ticks_per_interrupt);
}
void lapic_timer_stop(void) {
#include "mtrr.h"
-#include "uart_console.h"
+#include "console.h"
#define IA32_MTRRCAP 0xFE
#define IA32_MTRR_DEF_TYPE 0x2FF
/* Check MTRR support: CPUID.1:EDX bit 12 */
__asm__ volatile("cpuid" : "=a"(eax), "=d"(edx) : "a"(1) : "ebx", "ecx");
if (!(edx & (1U << 12))) {
- uart_print("[MTRR] Not supported by CPU\n");
+ kprintf("[MTRR] Not supported by CPU\n");
return;
}
uint64_t cap = rdmsr(IA32_MTRRCAP);
mtrr_count = (uint8_t)(cap & 0xFF);
if (mtrr_count == 0) {
- uart_print("[MTRR] No variable-range MTRRs available\n");
+ kprintf("[MTRR] No variable-range MTRRs available\n");
return;
}
mtrr_enabled = 1;
- uart_print("[MTRR] Initialized, ");
- /* Simple decimal print for count */
- char buf[4];
- buf[0] = (char)('0' + mtrr_count / 10);
- buf[1] = (char)('0' + mtrr_count % 10);
- buf[2] = '\0';
- uart_print(buf);
- uart_print(" variable-range registers\n");
+ kprintf("[MTRR] Initialized, %u variable-range registers\n",
+ (unsigned)mtrr_count);
}
int mtrr_set_range(uint64_t base, uint64_t size, uint8_t type) {
#include "arch/x86/percpu.h"
#include "arch/x86/smp.h"
#include "arch/x86/gdt.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stdint.h>
set_percpu_gdt_entry(PERCPU_GDT_BASE + i, (uint32_t)(uintptr_t)&g_percpu[i]);
}
- char tmp[12];
- uart_print("[PERCPU] Initialized for ");
- itoa(ncpus, tmp, 10);
- uart_print(tmp);
- uart_print(" CPU(s).\n");
+ kprintf("[PERCPU] Initialized for %u CPU(s).\n", (unsigned)ncpus);
}
void percpu_setup_gs(uint32_t cpu_index) {
#include "pmm.h"
#include "arch/x86/multiboot2.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "hal/mm.h"
void pmm_arch_init(void* boot_info) {
if (!boot_info) {
- uart_print("[PMM] Error: boot_info is NULL!\n");
+ kprintf("[PMM] Error: boot_info is NULL!\n");
return;
}
int saw_mmap = 0;
uint64_t freed_frames = 0;
- uart_print("[PMM] Parsing Multiboot2 info...\n");
+ kprintf("[PMM] Parsing Multiboot2 info...\n");
// First pass: determine total memory size
for (tag = (struct multiboot_tag *)((uint8_t *)boot_info + 8);
// Reserve low memory and frame 0
pmm_mark_region(0, 0x00100000, 1);
- uart_print("[PMM] total_memory bytes: ");
- char tmp[11];
- itoa_hex((uint32_t)total_memory, tmp);
- uart_print(tmp);
- uart_print("\n");
- uart_print("[PMM] freed_frames: ");
- itoa_hex((uint32_t)freed_frames, tmp);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[PMM] total_memory bytes: 0x%x\n", (unsigned)total_memory);
+ kprintf("[PMM] freed_frames: 0x%x\n", (unsigned)freed_frames);
if (freed_frames == 0) {
- uart_print("[PMM] WARN: no free frames detected (MMAP missing or parse failed).\n");
+ kprintf("[PMM] WARN: no free frames detected (MMAP missing or parse failed).\n");
}
// Protect Multiboot2 modules (e.g. initrd)
#include "arch/x86/percpu.h"
#include "arch/x86/idt.h"
#include "arch/x86/gdt.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "io.h"
#include "hal/cpu.h"
g_cpus[0].cpu_index = 0;
g_cpus[0].started = 1;
g_cpus[0].kernel_stack = 0;
- uart_print("[SMP] Single CPU enumerated.\n");
+ kprintf("[SMP] Single CPU enumerated.\n");
return 1;
}
g_cpus[i].kernel_stack = (uint32_t)(uintptr_t)&ap_stacks[i][AP_STACK_SIZE];
}
- char tmp[12];
- uart_print("[SMP] Enumerated ");
- itoa(g_cpu_count, tmp, 10);
- uart_print(tmp);
- uart_print(" CPU(s).\n");
+ kprintf("[SMP] Enumerated %u CPU(s).\n", (unsigned)g_cpu_count);
return (int)g_cpu_count;
}
*cr3_ptr = cr3_val;
*entry_ptr = (uint32_t)(uintptr_t)ap_entry;
- uart_print("[SMP] Starting ");
- char tmp[12];
- itoa(g_cpu_count - 1, tmp, 10);
- uart_print(tmp);
- uart_print(" AP(s)...\n");
+ kprintf("[SMP] Starting %u AP(s)...\n", (unsigned)(g_cpu_count - 1));
uint8_t sipi_vector = (uint8_t)(AP_TRAMPOLINE_PHYS >> 12);
}
if (g_cpus[i].started) {
- uart_print("[SMP] CPU ");
- itoa(g_cpus[i].lapic_id, tmp, 10);
- uart_print(tmp);
- uart_print(" started.\n");
+ kprintf("[SMP] CPU %u started.\n", (unsigned)g_cpus[i].lapic_id);
} else {
- uart_print("[SMP] CPU ");
- itoa(g_cpus[i].lapic_id, tmp, 10);
- uart_print(tmp);
- uart_print(" failed to start!\n");
+ kprintf("[SMP] CPU %u failed to start!\n", (unsigned)g_cpus[i].lapic_id);
}
}
if (g_cpus[i].started) started++;
}
- uart_print("[SMP] ");
- itoa(started, tmp, 10);
- uart_print(tmp);
- uart_print(" CPU(s) active.\n");
+ kprintf("[SMP] %u CPU(s) active.\n", (unsigned)started);
return (int)started;
}
#include "hal/cpu_features.h"
-#include "uart_console.h"
+#include "console.h"
#include <stdint.h>
void x86_sysenter_init(void) {
const struct cpu_features* f = hal_cpu_get_features();
if (!f->has_sysenter) {
- uart_print("[SYSENTER] CPU does not support SYSENTER/SYSEXIT.\n");
+ kprintf("[SYSENTER] CPU does not support SYSENTER/SYSEXIT.\n");
return;
}
wrmsr(IA32_SYSENTER_EIP, (uintptr_t)sysenter_entry);
sysenter_enabled = 1;
- uart_print("[SYSENTER] Fast syscall enabled.\n");
+ kprintf("[SYSENTER] Fast syscall enabled.\n");
}
void x86_sysenter_set_kernel_stack(uintptr_t esp0) {
#include "pmm.h"
#include "vmm.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "arch/x86/usermode.h"
#include "arch/x86/idt.h"
}
__attribute__((noreturn)) void x86_enter_usermode(uintptr_t user_eip, uintptr_t user_esp) {
- uart_print("[USER] enter ring3 eip=");
- char tmp[16];
- itoa_hex((uint32_t)user_eip, tmp);
- uart_print(tmp);
- uart_print(" esp=");
- itoa_hex((uint32_t)user_esp, tmp);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[USER] enter ring3 eip=0x%x esp=0x%x\n",
+ (unsigned)user_eip, (unsigned)user_esp);
__asm__ volatile(
"cli\n"
}
void x86_usermode_test_start(void) {
- uart_print("[USER] Starting ring3 test...\n");
+ kprintf("[USER] Starting ring3 test...\n");
const uintptr_t user_code_vaddr = 0x00400000U;
const uintptr_t user_stack_vaddr = 0x00800000U;
void* code_phys = pmm_alloc_page_low_16mb();
void* stack_phys = pmm_alloc_page_low_16mb();
if (!code_phys || !stack_phys) {
- uart_print("[USER] OOM allocating user pages.\n");
+ kprintf("[USER] OOM allocating user pages.\n");
return;
}
#include "vmm.h"
#include "pmm.h"
#include "heap.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "hal/cpu.h"
#include <stddef.h>
if ((pd[di] & X86_PTE_PRESENT) == 0) {
uint32_t pt_phys = (uint32_t)(uintptr_t)pmm_alloc_page_low();
if (!pt_phys) {
- uart_print("[VMM] OOM allocating page table.\n");
+ kprintf("[VMM] OOM allocating page table.\n");
return;
}
}
void vmm_init(void) {
- uart_print("[VMM] PAE paging active.\n");
+ kprintf("[VMM] PAE paging active.\n");
g_kernel_as = hal_cpu_get_address_space();
/* Test mapping */
vmm_map_page(0xB8000, 0xC00B8000, VMM_FLAG_PRESENT | VMM_FLAG_RW);
- uart_print("[VMM] Mapped VGA to 0xC00B8000.\n");
+ kprintf("[VMM] Mapped VGA to 0xC00B8000.\n");
}
#include "vmm.h"
#include "pmm.h"
#include "interrupts.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "io.h"
int e1000_init(void) {
const struct pci_device* dev = pci_find_device(E1000_VENDOR_ID, E1000_DEVICE_ID);
if (!dev) {
- uart_print("[E1000] Device not found.\n");
+ kprintf("[E1000] Device not found.\n");
return -1;
}
/* Read BAR0 (MMIO base) */
uint32_t bar0 = dev->bar[0];
if (bar0 & 1) {
- uart_print("[E1000] BAR0 is I/O (unsupported).\n");
+ kprintf("[E1000] BAR0 is I/O (unsupported).\n");
return -1;
}
uint32_t mmio_phys = bar0 & 0xFFFFFFF0U;
/* Read MAC address from EEPROM */
e1000_read_mac();
- uart_print("[E1000] MAC: ");
- char hex[4];
- for (int i = 0; i < 6; i++) {
- if (i) uart_print(":");
- hex[0] = "0123456789ABCDEF"[(e1000_mac[i] >> 4) & 0xF];
- hex[1] = "0123456789ABCDEF"[e1000_mac[i] & 0xF];
- hex[2] = '\0';
- uart_print(hex);
- }
- uart_print("\n");
+ kprintf("[E1000] MAC: %x:%x:%x:%x:%x:%x\n",
+ (unsigned)e1000_mac[0], (unsigned)e1000_mac[1],
+ (unsigned)e1000_mac[2], (unsigned)e1000_mac[3],
+ (unsigned)e1000_mac[4], (unsigned)e1000_mac[5]);
/* Init TX and RX rings */
if (e1000_init_tx() < 0) {
- uart_print("[E1000] Failed to init TX ring.\n");
+ kprintf("[E1000] Failed to init TX ring.\n");
return -1;
}
if (e1000_init_rx() < 0) {
- uart_print("[E1000] Failed to init RX ring.\n");
+ kprintf("[E1000] Failed to init RX ring.\n");
return -1;
}
e1000_ready = 1;
- char buf[12];
- uart_print("[E1000] Initialized, IRQ=");
- itoa(irq, buf, 10);
- uart_print(buf);
- uart_print(", MMIO=");
- itoa_hex(mmio_phys, buf);
- uart_print(buf);
- uart_print("\n");
+ kprintf("[E1000] Initialized, IRQ=%u, MMIO=0x%x\n",
+ (unsigned)irq, (unsigned)mmio_phys);
return 0;
}
#include "initrd.h"
#include "utils.h"
#include "heap.h"
-#include "uart_console.h"
+#include "console.h"
#include "errno.h"
#define TAR_BLOCK 512
initrd_finalize_nodes();
- uart_print("[INITRD] Found ");
- char buf[16]; itoa(files, buf, 10);
- uart_print(buf);
- uart_print(" files.\n");
+ kprintf("[INITRD] Found %d files.\n", files);
return &nodes[root];
}
#include "keyboard.h"
#include "devfs.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stddef.h>
static fs_node_t g_dev_kbd_node;
void keyboard_init(void) {
- uart_print("[KBD] Initializing Keyboard Driver...\n");
+ kprintf("[KBD] Initializing Keyboard Driver...\n");
spinlock_init(&kbd_lock);
spinlock_init(&scan_lock);
kbd_head = 0;
#include "pci.h"
-#include "uart_console.h"
+#include "console.h"
__attribute__((weak))
uint32_t pci_config_read(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
__attribute__((weak))
void pci_init(void) {
- uart_print("[PCI] Not supported on this architecture.\n");
+ kprintf("[PCI] Not supported on this architecture.\n");
}
__attribute__((weak))
#include "timer.h"
-#include "uart_console.h"
+#include "console.h"
#include "process.h"
#include "vdso.h"
}
void timer_init(uint32_t frequency) {
- uart_print("[TIMER] Initializing...\n");
+ kprintf("[TIMER] Initializing...\n");
hal_timer_init(frequency, hal_tick_bridge);
}
#include "devfs.h"
#include "fb.h"
#include "uaccess.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include <stddef.h>
int vbe_init(const struct boot_info* bi) {
if (!bi || bi->fb_addr == 0 || bi->fb_width == 0 || bi->fb_height == 0 || bi->fb_bpp == 0) {
- uart_print("[VBE] No framebuffer provided by bootloader.\n");
+ kprintf("[VBE] No framebuffer provided by bootloader.\n");
return -1;
}
g_vbe.virt_addr = (volatile uint8_t*)virt_base;
g_vbe_ready = 1;
- uart_print("[VBE] Framebuffer ");
- char buf[16];
- itoa(g_vbe.width, buf, 10); uart_print(buf);
- uart_print("x");
- itoa(g_vbe.height, buf, 10); uart_print(buf);
- uart_print("x");
- itoa(g_vbe.bpp, buf, 10); uart_print(buf);
- uart_print(" @ 0x");
- itoa_hex(g_vbe.phys_addr, buf); uart_print(buf);
- uart_print(" mapped to 0x");
- itoa_hex(virt_base, buf); uart_print(buf);
- uart_print("\n");
+ kprintf("[VBE] Framebuffer %ux%ux%u @ 0x%x mapped to 0x%x\n",
+ (unsigned)g_vbe.width, (unsigned)g_vbe.height,
+ (unsigned)g_vbe.bpp, (unsigned)g_vbe.phys_addr,
+ (unsigned)virt_base);
return 0;
}
g_dev_fb0_node.mmap = &fb0_mmap;
devfs_register_device(&g_dev_fb0_node);
- uart_print("[VBE] Registered /dev/fb0\n");
+ kprintf("[VBE] Registered /dev/fb0\n");
}
#include "vmm.h"
#include "arch/x86/idt.h"
#include "spinlock.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "errno.h"
/* Find IDE controller: PCI class 0x01 (Mass Storage), subclass 0x01 (IDE) */
const struct pci_device* ide = pci_find_class(0x01, 0x01);
if (!ide) {
- uart_print("[ATA-DMA] No PCI IDE controller found.\n");
+ kprintf("[ATA-DMA] No PCI IDE controller found.\n");
return -ENODEV;
}
/* BAR4 contains the Bus Master IDE I/O base */
uint32_t bar4 = ide->bar[4];
if ((bar4 & 1) == 0) {
- uart_print("[ATA-DMA] BAR4 is not I/O space.\n");
+ kprintf("[ATA-DMA] BAR4 is not I/O space.\n");
return -ENODEV;
}
bm_base = (uint16_t)(bar4 & 0xFFFC);
if (bm_base == 0) {
- uart_print("[ATA-DMA] BAR4 I/O base is zero.\n");
+ kprintf("[ATA-DMA] BAR4 I/O base is zero.\n");
return -ENODEV;
}
* We only need 1 PRD entry (8 bytes) but allocate a full page. */
void* prdt_page = pmm_alloc_page();
if (!prdt_page) {
- uart_print("[ATA-DMA] Failed to allocate PRDT page.\n");
+ kprintf("[ATA-DMA] Failed to allocate PRDT page.\n");
return -ENOMEM;
}
prdt_phys = (uint32_t)(uintptr_t)prdt_page;
/* Allocate DMA bounce buffer: one page for sector transfers */
void* buf_page = pmm_alloc_page();
if (!buf_page) {
- uart_print("[ATA-DMA] Failed to allocate DMA buffer page.\n");
+ kprintf("[ATA-DMA] Failed to allocate DMA buffer page.\n");
pmm_free_page(prdt_page);
return -ENOMEM;
}
dma_available = 1;
- char tmp[12];
- uart_print("[ATA-DMA] Initialized, BM I/O base=");
- itoa_hex(bm_base, tmp);
- uart_print(tmp);
- uart_print("\n");
+ kprintf("[ATA-DMA] Initialized, BM I/O base=0x%x\n", (unsigned)bm_base);
return 0;
}
if (bm_stat & BM_STATUS_ERR) {
outb((uint16_t)(bm_base + BM_CMD), 0);
outb((uint16_t)(bm_base + BM_STATUS), BM_STATUS_IRQ | BM_STATUS_ERR);
- uart_print("[ATA-DMA] Bus master error!\n");
+ kprintf("[ATA-DMA] Bus master error!\n");
return -EIO;
}
if (ata_stat & ATA_SR_ERR) {
outb((uint16_t)(bm_base + BM_CMD), 0);
outb((uint16_t)(bm_base + BM_STATUS), BM_STATUS_IRQ | BM_STATUS_ERR);
- uart_print("[ATA-DMA] ATA error during DMA!\n");
+ kprintf("[ATA-DMA] ATA error during DMA!\n");
return -EIO;
}
__atomic_store_n(&dma_active, 0, __ATOMIC_SEQ_CST);
if (!completed) {
- uart_print("[ATA-DMA] Transfer timeout!\n");
+ kprintf("[ATA-DMA] Transfer timeout!\n");
return -EIO;
}
#include "errno.h"
#include "io.h"
#include "arch/x86/idt.h"
-#include "uart_console.h"
+#include "console.h"
/* Basic IRQ 14 handler: read ATA status to deassert INTRQ.
* Registered early so PIO IDENTIFY doesn't cause an IRQ storm. */
// Try to upgrade to DMA mode
if (ata_dma_init() == 0) {
- uart_print("[ATA] Using DMA mode.\n");
+ kprintf("[ATA] Using DMA mode.\n");
} else {
- uart_print("[ATA] Using PIO mode (DMA unavailable).\n");
+ kprintf("[ATA] Using PIO mode (DMA unavailable).\n");
}
return 0;
#include "hal/cpu_features.h"
#include "arch/x86/cpuid.h"
-#include "uart_console.h"
+#include "console.h"
#include <stddef.h>
uint32_t cr4 = read_cr4();
cr4 |= CR4_SMEP;
write_cr4(cr4);
- uart_print("[CPU] SMEP enabled.\n");
+ kprintf("[CPU] SMEP enabled.\n");
}
/* SMAP (Supervisor Mode Access Prevention) is NOT enabled yet because
#include "pci.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "io.h"
pci_scan_bus(0);
}
- uart_print("[PCI] Enumerated ");
- char buf[8];
- itoa(pci_device_count, buf, 10);
- uart_print(buf);
- uart_print(" device(s)\n");
+ kprintf("[PCI] Enumerated %d device(s)\n", pci_device_count);
for (int i = 0; i < pci_device_count; i++) {
struct pci_device* d = &pci_devices[i];
- uart_print(" ");
- char hex[12];
- itoa_hex(d->vendor_id, hex); uart_print(hex);
- uart_print(":");
- itoa_hex(d->device_id, hex); uart_print(hex);
- uart_print(" class=");
- itoa_hex(d->class_code, hex); uart_print(hex);
- uart_print(":");
- itoa_hex(d->subclass, hex); uart_print(hex);
- uart_print("\n");
+ kprintf(" %x:%x class=%x:%x\n",
+ (unsigned)d->vendor_id, (unsigned)d->device_id,
+ (unsigned)d->class_code, (unsigned)d->subclass);
}
}
#include "arch/x86/idt.h"
#include "arch/x86/lapic.h"
#include "io.h"
-#include "uart_console.h"
+#include "console.h"
static hal_timer_tick_cb_t g_tick_cb = 0;
#include "hal/cpu_features.h"
-#include "uart_console.h"
+#include "console.h"
#include <stddef.h>
void hal_cpu_detect_features(void) {
for (size_t i = 0; i < sizeof(g_default_features); i++)
((uint8_t*)&g_default_features)[i] = 0;
- uart_print("[CPU] No arch-specific feature detection.\n");
+ kprintf("[CPU] No arch-specific feature detection.\n");
}
__attribute__((weak))
__attribute__((weak))
void hal_cpu_print_features(void) {
- uart_print("[CPU] Feature detection not available.\n");
+ kprintf("[CPU] Feature detection not available.\n");
}
#include "ata_pio.h"
#include "heap.h"
#include "utils.h"
-#include "uart_console.h"
+#include "console.h"
#include "errno.h"
#include <stddef.h>
fs_node_t* fat16_mount(uint32_t partition_lba) {
if (fat16_read_sector(partition_lba, g_sector_buf) < 0) {
- uart_print("[FAT16] Failed to read BPB\n");
+ kprintf("[FAT16] Failed to read BPB\n");
return NULL;
}
struct fat16_bpb* bpb = (struct fat16_bpb*)g_sector_buf;
if (bpb->bytes_per_sector != 512) {
- uart_print("[FAT16] Unsupported sector size\n");
+ kprintf("[FAT16] Unsupported sector size\n");
return NULL;
}
if (bpb->fat_size_16 == 0 || bpb->num_fats == 0) {
- uart_print("[FAT16] Invalid BPB\n");
+ kprintf("[FAT16] Invalid BPB\n");
return NULL;
}
g_fat_root.flags = FS_DIRECTORY;
g_fat_root.finddir = fat16_finddir;
- uart_print("[FAT16] Mounted at LBA ");
- char buf[12];
- int bi = 0;
- uint32_t v = partition_lba;
- if (v == 0) { buf[bi++] = '0'; }
- else {
- char tmp[12]; int ti = 0;
- while (v) { tmp[ti++] = (char)('0' + v % 10); v /= 10; }
- while (ti--) buf[bi++] = tmp[ti];
- }
- buf[bi] = '\0';
- uart_print(buf);
- uart_print("\n");
+ kprintf("[FAT16] Mounted at LBA %u\n", partition_lba);
return &g_fat_root;
}
#include "socket.h"
#include "vbe.h"
#include "keyboard.h"
-#include "uart_console.h"
+#include "console.h"
#include "hal/mm.h"
HAL_MM_MAP_RW, &initrd_virt) == 0) {
fs_root = initrd_init((uint32_t)initrd_virt);
} else {
- uart_print("[INITRD] Failed to map initrd physical range.\n");
+ kprintf("[INITRD] Failed to map initrd physical range.\n");
}
}
#include "kaslr.h"
#include "hal/cpu.h"
-#include "uart_console.h"
+#include "console.h"
static uint32_t prng_state;
uint64_t tsc = hal_cpu_read_timestamp();
prng_state = (uint32_t)(tsc ^ (tsc >> 32));
if (prng_state == 0) prng_state = 0xDEADBEEF;
- uart_print("[KASLR] PRNG seeded from TSC\n");
+ kprintf("[KASLR] PRNG seeded from TSC\n");
}
uint32_t kaslr_rand(void) {
#include <stddef.h>
#include "console.h"
#include "vga_console.h"
-#include "uart_console.h"
#include "pmm.h"
#include "vmm.h"
#include "process.h"
#include "pmm.h"
#include "vmm.h"
#include "heap.h"
-#include "uart_console.h"
+#include "console.h"
#include "timer.h" // Need access to current tick usually, but we pass it in wake_check
#include "spinlock.h"
#include "utils.h"
}
void process_init(void) {
- uart_print("[SCHED] Initializing Multitasking...\n");
+ kprintf("[SCHED] Initializing Multitasking...\n");
uintptr_t flags = spin_lock_irqsave(&sched_lock);
struct process* kernel_proc = (struct process*)kmalloc(sizeof(*kernel_proc));
if (!kernel_proc) {
spin_unlock_irqrestore(&sched_lock, flags);
- uart_print("[SCHED] OOM allocating kernel process struct.\n");
+ kprintf("[SCHED] OOM allocating kernel process struct.\n");
for(;;) hal_cpu_idle();
__builtin_unreachable();
}
void* kstack0 = kstack_alloc();
if (!kstack0) {
spin_unlock_irqrestore(&sched_lock, flags);
- uart_print("[SCHED] OOM allocating PID 0 kernel stack.\n");
+ kprintf("[SCHED] OOM allocating PID 0 kernel stack.\n");
for (;;) hal_cpu_idle();
__builtin_unreachable();
}
#include "errno.h"
#include "process.h"
#include "waitqueue.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "lwip/tcp.h"
#include "process.h"
#include "spinlock.h"
#include "uaccess.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#include "heap.h"
#include "process.h"
#include "waitqueue.h"
#include "spinlock.h"
+#include "console.h"
#include "uart_console.h"
#include "uaccess.h"
#include "errno.h"
if (c == 0x03) {
spin_unlock_irqrestore(&tty_lock, flags);
if (lflag & TTY_ECHO) {
- uart_print("^C\n");
+ kprintf("^C\n");
}
if (tty_fg_pgrp != 0) {
process_kill_pgrp(tty_fg_pgrp, SIGINT_NUM);
if (c == 0x1C) {
spin_unlock_irqrestore(&tty_lock, flags);
if (lflag & TTY_ECHO) {
- uart_print("^\\\n");
+ kprintf("^\\\n");
}
if (tty_fg_pgrp != 0) {
process_kill_pgrp(tty_fg_pgrp, SIGQUIT_NUM);
if (c == 0x1A) {
spin_unlock_irqrestore(&tty_lock, flags);
if (lflag & TTY_ECHO) {
- uart_print("^Z\n");
+ kprintf("^Z\n");
}
if (tty_fg_pgrp != 0) {
process_kill_pgrp(tty_fg_pgrp, SIGTSTP_NUM);
if (c == 0x04 && (lflag & TTY_ICANON)) {
if (lflag & TTY_ECHO) {
- uart_print("^D");
+ kprintf("^D");
}
for (uint32_t i = 0; i < line_len; i++) {
canon_push(line_buf[i]);
if (line_len > 0) {
line_len--;
if (lflag & TTY_ECHO) {
- uart_print("\b \b");
+ kprintf("\b \b");
}
}
spin_unlock_irqrestore(&tty_lock, flags);
#include "pmm.h"
#include "vmm.h"
#include "utils.h"
-#include "uart_console.h"
+#include "console.h"
static uintptr_t vdso_phys = 0;
static volatile struct vdso_data* vdso_kptr = 0;
void vdso_init(void) {
void* page = pmm_alloc_page();
if (!page) {
- uart_print("[VDSO] OOM\n");
+ kprintf("[VDSO] OOM\n");
return;
}
vdso_phys = (uintptr_t)page;
memset((void*)vdso_kptr, 0, PAGE_SIZE);
vdso_kptr->tick_hz = 50;
- uart_print("[VDSO] Initialized at phys=0x");
- /* Simple hex print */
- char hex[9];
- for (int i = 7; i >= 0; i--) {
- uint8_t nib = (uint8_t)((vdso_phys >> (i * 4)) & 0xF);
- hex[7 - i] = (char)(nib < 10 ? '0' + nib : 'a' + nib - 10);
- }
- hex[8] = '\0';
- uart_print(hex);
- uart_print("\n");
+ kprintf("[VDSO] Initialized at phys=0x%x\n", (unsigned)vdso_phys);
}
void vdso_update_tick(uint32_t tick) {
#include "heap.h"
-#include "uart_console.h"
+#include "console.h"
#include "pmm.h"
#include "vmm.h"
#include "spinlock.h"
/* ---- Public API ---- */
void kheap_init(void) {
- uart_print("[HEAP] Initializing Buddy Allocator...\n");
+ kprintf("[HEAP] Initializing Buddy Allocator...\n");
uintptr_t flags = spin_lock_irqsave(&heap_lock);
void* phys = pmm_alloc_page();
if (!phys) {
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] OOM during init!\n");
+ kprintf("[HEAP] OOM during init!\n");
return;
}
vmm_map_page((uint64_t)(uintptr_t)phys, (uint64_t)va,
fl_add(&free_lists[BUDDY_MAX_ORDER - BUDDY_MIN_ORDER], blk_to_fn(root));
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] 8MB Buddy Allocator Ready.\n");
+ kprintf("[HEAP] 8MB Buddy Allocator Ready.\n");
}
void* kmalloc(size_t size) {
if (k > BUDDY_MAX_ORDER) {
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] OOM: kmalloc failed.\n");
+ kprintf("[HEAP] OOM: kmalloc failed.\n");
return NULL;
}
if (blk->magic != BUDDY_MAGIC || !blk->is_free) {
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] Corruption in kmalloc!\n");
+ kprintf("[HEAP] Corruption in kmalloc!\n");
for (;;) hal_cpu_idle();
}
if (blk->magic != BUDDY_MAGIC) {
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] Corruption in kfree! (bad magic)\n");
- char a[11], m[11];
- itoa_hex((uint32_t)(uintptr_t)blk, a);
- itoa_hex(blk->magic, m);
- uart_print("[HEAP] hdr="); uart_print(a);
- uart_print(" magic="); uart_print(m);
- uart_print("\n");
+ kprintf("[HEAP] Corruption in kfree! (bad magic)\n");
+ kprintf("[HEAP] hdr=0x%x magic=0x%x\n",
+ (unsigned)(uintptr_t)blk, (unsigned)blk->magic);
for (;;) hal_cpu_idle();
}
if (blk->is_free) {
spin_unlock_irqrestore(&heap_lock, flags);
- uart_print("[HEAP] Double free!\n");
+ kprintf("[HEAP] Double free!\n");
for (;;) hal_cpu_idle();
}
#include "pmm.h"
#include "utils.h"
-#include "uart_console.h"
+#include "console.h"
#include "hal/cpu.h"
#include "hal/mm.h"
#include "spinlock.h"
__attribute__((weak))
void pmm_arch_init(void* boot_info) {
(void)boot_info;
- uart_print("[PMM] No arch-specific memory init. Assuming 16MB.\n");
+ kprintf("[PMM] No arch-specific memory init. Assuming 16MB.\n");
pmm_set_limits(16 * 1024 * 1024, 0);
}
pmm_mark_region(phys_start_aligned, kernel_size, 1);
- uart_print("[PMM] Initialized.\n");
+ kprintf("[PMM] Initialized.\n");
}
void* pmm_alloc_page(void) {
#include "pmm.h"
#include "heap.h"
#include "hal/mm.h"
-#include "uart_console.h"
+#include "console.h"
#include <stddef.h>
#include "dns.h"
-#include "uart_console.h"
+#include "console.h"
#include "lwip/dns.h"
#include "lwip/ip_addr.h"
(server_ip >> 8) & 0xFF,
server_ip & 0xFF);
dns_setserver(0, &dns_server);
- uart_print("[DNS] Resolver initialized\n");
+ kprintf("[DNS] Resolver initialized\n");
}
static volatile int dns_done;
#include "netif/ethernet.h"
#include "e1000.h"
-#include "uart_console.h"
+#include "console.h"
#include "utils.h"
#define E1000_NETIF_MTU 1500
void net_init(void) {
if (!e1000_link_up()) {
- uart_print("[NET] E1000 link down, skipping lwIP init.\n");
+ kprintf("[NET] E1000 link down, skipping lwIP init.\n");
return;
}
net_initialized = 1;
- uart_print("[NET] lwIP initialized (threaded), IP=10.0.2.15\n");
+ kprintf("[NET] lwIP initialized (threaded), IP=10.0.2.15\n");
}
void net_poll(void) {