]> Projects (at) Tadryanom (dot) Me - AdrOS.git/commit
refactor: proper time-slice scheduler + fix arch contamination + mask PIT
authorTulio A M Mendes <[email protected]>
Sat, 14 Feb 2026 08:24:36 +0000 (05:24 -0300)
committerTulio A M Mendes <[email protected]>
Sat, 14 Feb 2026 08:24:36 +0000 (05:24 -0300)
commitf853f2c51e13d333c85ddb0fd34f06ca222a90c3
tree579a93f401cb0700f03c371e927aa3ad4e6f6a5c
parentc2e9f06d1f18602fc995746e6d9392ef162b02df
refactor: proper time-slice scheduler + fix arch contamination + mask PIT

Three fixes for the 100Hz timer upgrade:

1. **Arch contamination removed from drivers/timer.c**
   - Moved BSP-only guard (lapic_get_id check) from generic
     src/drivers/timer.c into src/hal/x86/timer.c where it belongs
   - drivers/timer.c now has zero #ifdef or arch-specific includes

2. **Proper time-slice scheduling replaces tick%2 hack**
   - Added time_slice field to struct process (SCHED_TIME_SLICE=2)
   - schedule() skips preemption while time_slice > 0, decrementing
     each tick. Voluntary yields (sleep/waitpid/sem) bypass the
     check entirely — only timer-driven preemption is rate-limited
   - Effective preemption rate: TIMER_HZ/SCHED_TIME_SLICE = 50Hz
   - Sleep/wake resolution remains at full 100Hz via process_wake_check

3. **PIT IRQ 0 masked when LAPIC timer is active**
   - ioapic_mask_irq(0) called before lapic_timer_start()
   - Eliminates ~18 extra ticks/sec from PIT double-ticking BSP
   - Tick counter now advances at exactly 100Hz, fixing ~18% timing
     error in all sleep/timing calculations

Tests: 20/20 smoke (8s), 16/16 battery, cppcheck clean
include/process.h
src/drivers/timer.c
src/hal/x86/timer.c
src/kernel/scheduler.c